5 RTC相关¶
5.1 RTC时钟启动不起来¶
现象:
One customer has 5 boards, 4 of which RTC does not work, 2-layer board, replaced the crystal on our evb, the crystal occasionally can work, but also runs slow, then stops running;，
Experiments done:;
1，The default BM bias current in mem32 0x4007a01c 1 register is 2, in the jlink interface, rewrite the BM value to 2, RTC can run;;
2，In the code HAL_PMU_EnableXTAL32, change the BM bias current from the default 0x2 to 0x03 to increase the crystal drive current through the PMU register, RTC can slowly run, change to 0x6, it can run after 10 seconds, change to 0x9, it can run after 4 seconds, change to 0xa, it can run immediately, but there is a 2-second repetition;;
3，After changing to 0xb, the RTC test is completely normal;，;
Since the BM in register 0x4007a01c is increased from 2 to 3, it will increase the current by 80nA. If it is directly increased to 0xb, the current will be increased by 9 times;，
Due to the setting less than 0xb, the RTC startup time is too long;;
Today, some more experiments were done to locate the root cause;;
a， First, configure PB01 to output 32768 clock for viewing the clock;，
After Jlink connection;
a)，Command input: w4 0x40043004 0x2f9 switch PB01 to function 9;，
b)，Command input: w4 0x4004F018 0x8 set the DBGCLKR bit3 CLK_EN in LSYSCFG to 1;，
You can use the mem32 0x40043004 1 command to read back and confirm whether it is written in;，
If you add configuration in the code, you can modify the PB01 mode to 9 DBG_CLK in pinmux.c;，
HAL_PIN_Set(PAD_PB01, DBG_CLK, PIN_NOPULL, 0);
_WWORD(0x4004F018, 0x8); // PB01 output 32768 clk
b，Check the 32768 waveforms of the normal board and the abnormal board as follows;:
b，Swap the 32768 crystals of the normal and abnormal boards, the problem follows the motherboard, and has nothing to do with the crystal;;
c， Supply Vbuck1 with 1.25V, the RTC clock test is normal;;
d， Therefore, it is suspected that there is a problem with Vbuck1 power supply, replace the DCDC 4.7uH inductor, no improvement, after paralleling a 10uF capacitor to the 4.7uF capacitor of Vbuck DCDC, the rtc problem is solved;；
根本原因:
The DCDC inductor and capacitor are too far from the CPU on the large board, the filter capacitor is 0402 package, the capacity seems insufficient;，
Previously supported, encountered many bad phenomena caused by insufficient Isat current of DCDC inductors;，
Therefore, we hope that hardware engineers can pay more attention to the selection and layout of DCDC inductors and filter capacitors;.
5.2 55X系列MCU的RTC时钟从PB口输出32768方法¶
For example: the specific method of outputting 32768 clocks through PB01;:
After Jlink connection;
A，Command input: w4 0x40043004 0x2f9 switch PB01 to function 9;，
B，Command input: w4 0x4004F018 0x8 set the DBGCLKR bit3 CLK_EN in LSYSCFG to 1;，
可以用mem32 0x40043004 1 命令读回确认是否写进去，
If you add configuration in the code, you can modify the PB01 mode to 9 DBG_CLK in pinmux.c;，
HAL_PIN_Set(PAD_PB01, DBG_CLK, PIN_NOPULL, 0);
_WWORD(0x4004F018, 0x8); // PB01 output 32768 clk
5.3 省32768晶体方案采用内部RC时钟方法¶
1，How to enable;：
In the Hcpu project menuconfig, check (Top) → Board Config → Lower crystal disabled;
After generating the following macros in rtconfig.h, Hcpu will write the configuration into the register, Lcpu will get the register status through the function HAL_LXT_DISABLED, in the bootloader, the default is RC10k clock, no modification is needed;；
#define LXT_DISABLE 1
#define LXT_LP_CYCLE 200
Here, 200 represents the measurement duration, in units of RC10K cycles, see how many 48M cycles are in 200 RC10K cycles, calculate the actual frequency of RC10K;;
To solve the problem of inaccurate RTC timing after switching to the RC clock, the solution is for lcpu to start a timer named “rc10 or rtc” with a period of 15 seconds, hcpu starts a 5-minute timer (52 only has one 15-second period timer for Hcpu), after the timer starts, calibrate based on the clock of the 48M crystal, correct the current RTC timing accuracy;；
2，After modifying to the internal RC10K oscillator, the oscillation frequency changes from 32768 to 8：
从601272/32.768 变成 601272/9 (ms)
[160579] TOUCH: Power off done.
[pm]S:4,160586
[pm]W:601272
如上，sleep到wake之间的持续时间计算：
(601272-160586)/9=48965(ms)
3，采用rc10k和外部32768晶体的对比优缺点如下：
rc10k |
32768晶体 |
|
|---|---|---|
精度 |
取决于48M晶体精度和校准算法 |
高 |
功耗 |
15秒周期唤醒开销约增加15uA |
低 |
成本 |
低 |
高 |
IO输出32K |
不能通过IO输出32768 |
能配置输出32768给wifi/gps等外设用 |
5.4 RTC获取的时间戳是100年00月01日 0时0分0秒原因¶
1，第一种情况，整机复位或者Lcpu复位，在还没有往RTC写入时钟前
如下图：
2，第二种情况，CPU从Standby醒来后, 马上读取RTC,延时不够1/256秒（约4ms）。
由于Hcpu从standby醒来会超过4ms，醒来后可以直接读取RTC，
Lcpu从standby醒来，马上读取RTC这会出现此现象，因此Lcpu从standby醒来不建议频繁读取RTC，如果需要频繁读取，可以采用我们提供的软时间方式，替代之前的直接读取RTC。
#ifdef SOC_BF0_LCPU
timestamp = service_lcpu_get_current_time();
#else
timestamp = time(RT_NULL);
#endif
而通过一个定时器30s，service_lcpu_soft_timestamp_reset()函数，来定时同步RTC和软RTC的时间。
5.5 如何设置RTC默认时间（solution）¶
初始时间在在app_comm.c中的app_set_default_system_time中设置，按需修改对应的宏定义即可：
int app_set_default_system_time(void)
{
if (PM_COLD_BOOT == SystemPowerOnModeGet())
{
setting_time_t default_time = {0};
default_time.year = SIFLI_DEFAULT_YEAR;
default_time.month = SIFLI_DEFAUL：T_MON;
default_time.day = SIFLI_DEFAULT_DAY;
default_time.hour = SIFLI_DEFAULT_HOUR;
default_time.min = SIFLI_DEFAULT_MIN;
default_time.second = SIFLI_DEFAULT_SECOND;
default_time.zone = SIFLI_DEFAULT_TIMEZONE;
app_update_system_time(&default_time);
}
return 0;
}
5.76 省32768晶体方案（内部RC10K时钟）走时不准调整方法¶
1，确保48Mhz的已校准，保证48M晶体的精度；
2，可以调整校准的补偿，方法如下：
#define RTC_PPM 75 //可以为负数
Calculation algorithm;：
For example, a customer reported that the RTC was 21 seconds slow after 32 hours. Since it is slow, to speed up the clock is to increase RTC_PPM, which is how many more clocks per 1M;
计算公式如下：
21 / (32 *60*60) *1000000=182
32 hours is approximately 326060 = 115200 seconds, being 21 seconds slow means 1M seconds would be slow by 21/115200 * 1000000=182 seconds;
According to the above method, after calculating the compensation of 182, testing for 40 hours and being 2 seconds slow met the customer’s requirements.