screen模组介绍¶
screen模组构成¶
A screen module usually includes a screen driver IC, an LCD panel, a backlight panel (not present in AMOLED screens), FPC flexible flat cables, etc. For touch-enabled screens, there will also be a separate touch (TP) driver IC.
Accordingly, the debugging of a screen module also involves the debugging of the driver for the screen driver chip, as well as the debugging of drivers for the backlight panel or power supply, etc. Touch screens also require the debugging of the driver for the touch chip.
screendrive芯片的常见interface¶
Typically, a screen driver IC can support multiple interfaces. The specific interface used is selected by configuring the pull-up or pull-down of the IM[2:0] signals on the IO ports of the screen driver IC on the screen module. Some screen driver ICs can select interfaces via internal registers. Refer to the screen module’s documentation for specifics. 常见的screeninterface有如below几类：
SPIinterface¶
The SPI interface is widely used in screen modules because it uses fewer pins and has high transmission bandwidth, so it can be used both as a configuration interface for the screen driver and directly for transmitting image data. Especially in low-resolution scenarios, quite high refresh rates can be achieved through the SPI interface.
通过SPIinterface进行screen drive配置的manner与传统SPI没有差别，这里不做过many赘述，以below内容主要针对的是figure像data传输的SPIinterface(以below简称figure像SPIinterface)。
Image SPI Interface Classification：
The Image SPI interface is divided into 3-wire SPI and 4-wire SPI according to the transmission protocol.
3-wire SPI
As the name suggests, there are three signal lines: Chip Select CS, Clock SCLK, and bidirectional data line SDIO. During transmission, a Data/Command identifier bit is sent first, followed by the transmission.如belowfigure：
It can be seen from the figure that after CS is pulled low to select, the DCX signal is first sent on SDO to indicate whether the following transmission is data or command, and then the transmission proceeds. Therefore, during 3-wire SPI transmission, the actual effective bandwidth is 8/9 of the theoretical bandwidth.
4-wire SPI
Compared with 3-wire SPI, 4-wire SPI additionally increases the DC signal line to identify the transmission of data and commands.传输过程如belowfigure：
The DCX signal in the figure remains stable during transmission, used to identify whether the current transmission is data or a command. Because of the introduction of the additional DCX signal line, the actual effective bandwidth of 4-wire SPI will be higher than that of 3-wire SPI, equal to the theoretical bandwidth.
In addition to being classified according to the transmission protocol, the Image SPI interface can also be classified by the data line width. Common data line widths are 1-bit (single data line SPI), 2-bit (dual data line DSPI), and 4-bit (quad data line QSPI).
Single Data Line SPI
Single data line SPI transmits 1-bit of data per clock cycle. The previously mentioned 3-wire SPI and 4-wire SPI are both single data line SPIs, so they will not be elaborated further here.
Dual Data Line DSPI
Dual data line SPI transmits 2-bits of data per clock cycle, doubling the transmission bandwidth compared to single data line SPI.
3-wire SPI对应的DSPI传输如belowfigure所示：
It can be seen in the figure that similar to the 3-wire SPI protocol, each transmission sends a DCX identification bit using one cycle before proceeding with subsequent signal transmission. As shown in the figure, every 8 bits transmitted corresponds to one DCX identification bit, making the actual bandwidth 4/5 of the theoretical bandwidth. In practical use, many screen drivers support one DCX identification bit for every 16 bits or 24 bits transmitted to increase bandwidth utilization to 8/9 and 12/13 respectively.
4-wire SPI对应的DSPI传输如belowfigure所示：
It can be seen in the figure that the DSPI corresponding to 4-wire SPI does not have a separate DCX identification bit. In actual screen driver chips, some chips enter data transmission mode through single data line instructions, so no DCX identification bit is needed in subsequent transmissions. This maximizes the use of DSPI bandwidth, making the actual bandwidth consistent with the theoretical value. Compared to single data line 4-wire SPI, dual data line DSPI achieves twice the bandwidth with the same number of signals.
Quad Data Line QSPI
Quad data line QSPI adds two more signal lines responsible for data transmission compared to dual data line DSPI.
3-wire SPI对应的QSPI传输如belowfigure所示：
figure中可以看到，QSPI在每一笔传输前会先send一个DCX，然后进行后续的传输。figure中每传输8bit对应一个DCX标识位，则实际with宽为理论贷款的2/3。实际screen drive芯片会支持每一个DCX标识位，传输16bit或24bit的data，这样with宽利用率可以提high到4/5或者8/9。
4-wire SPI对应的QSPI传输如belowfigure所示：
figure中QSPI在传输data时，与DSPI一样没有DCX标识位，这样可以保证实际with宽达到理论with宽。同样大部分screen drive芯片会通过singledata line的指令进入data传输模式，从而在data传输过程中最大化利用QSPI的with宽能力。
以上是最常见的SPIinterface，protocol上分为3-wire和4-wire两种模式，data位宽上分为singledata line，双data line和四data line。两者组合共有6种模式，用户需要根据实际screen drive文档，确定实际场景中使用的模式。对于SPIinterface，外部的screen drive一般情况below需要withGRAM，所以对外部screen driverequirement会high一些。
为了进一步提升传输with宽，最近也有一些screen drive芯片开始支持DDR模式的data传输，相比较SDR模式，with宽又可以提升一倍。
DPI/RGBinterface¶
DPIinterface也就是通常所说的RGBinterface，DPIinterface一般由16~24bit的datasignal，以及PCLK，HSYNC，VSYNC，DE等时钟和controlsignalconsist of。DPIinterface的screen drive通常没有内部GRAM，需要主控端持续sendfigure像data，对screen内容持续刷新，因此对主控的性能requirement也更high。
DPIsignalinterfacefigure示：
DPIinterfacesignal需要满足DPI专有的时序，大致可以参考belowfigure所示：
如figure所示，用户在配置DPIscreeninterface时，需要参考screen drive芯片资料，对figure中各项时序参数进行配置。参数包括：VS_WIDTH，HS_WIDTH，HBP，HFP，VBP，VFP，Vertical Display Area，Horizontal Display Area。
MIPI-DSIinterface¶
MIPI-DSIinterface，也就是通常所说的MIPI屏interface，该interface由一对时钟差分signal线和1/2/4对data差分signal线consist of。因为时钟和data均为差分signal，所以MIPIinterface有更high的speed，更强的抗干扰能力。同时对电路外围的干扰也会更小，很适合于high集成度的场景，例如穿戴设备。
MIPI-DSIinterface通常有两种工作模式，Command模式和Video模式。Command针对的是相对较小分辨率，有内部GRAM的screen drive芯片，大部分SPIinterface的screen也是这一类screen drive芯片。Video模式针对没有GRAM的screen drive芯片，需要持续的对screen进行刷新，机制与DPIinterfacesimilar。该模式对MCU主端requirement也higher。
The figure below shows a DSI interface with a single Data Lane：
MCU/8080 interface¶
MCU/8080 interface有很many其他name，Because it originated from Intel’s interface, it is also called the Intel interface，Another commonly used name is the DBI interface，It originates from the DBI interface protocol in the MIPI standard。The interface consists of independent read/write control signals and 8/16 data buses。
The figure below shows a typical MCU/8080 interface diagram：
The MCU/8080 interface in the figure consists of chip select signal CSX, write control WRX, read control RDX, Data/Command selection D/CX, and 8 data lines。When writing, data is sent by flipping WRX, and when reading, data is read by flipping RDX。Its access method is similar to memory access。
The advantage of the MCU/8080 interface is that it is simple to control and easy to implement。But the disadvantages are also obvious, as a parallel interface, it uses more signals and has a relatively low speed。In addition, the MCU/8080 interface requires the screen drive side to have GRAM, which will also make the cost of the screen drive higher。