SiFli Solution is now fully open: a production-ready solution set that accelerates projects from prototype to mass production. Solution Documentation.

SiFli-Wiki SiFli-Wiki SiFli-Wiki
  • User Guide
  • Examples
  • API Documentation
  • About Us
/
  • English
  • 中文

Quick Start

  • Getting Started
  • Product Documentation Summary

Software Development

  • SDK Programming Guide
  • API Documentation
  • Solution Programming Guide
  • FAQ Frequently Asked Questions
    • Development Tool-Related Issues
      • 1 Compilation-Related
      • 2 Jlink
      • 3 KEIL
      • 4 Ozone
      • 5 SiFli
      • 6 Trace32
      • 7 SystemView
      • 8 UART
      • 9 Source Insight-related
    • Chip-Related Issues
      • 1 GPIO-related
      • 2 Timer-Related
      • 3 Interrupt-related
      • 4 Watchdog-Related
      • 5 RTC Related
      • 6 ADC Related
      • 7 I2C-related
      • 8 Low Power-Related
      • 9 PWM
      • 10 System
      • 11 Bluetooth
      • 12 USB-Related
      • 13 UART-Related
      • 14 Dual-core Related
      • 15 I2S-related
      • 13 SPI Related Issues
    • Peripheral Driver Debugging Issues
      • 1 Common LCD Debugging Issues
      • 2 Common Sensor Debugging Issues
      • 3 Common Flash Debugging Issues
      • 4 Common Motor Debugging Issues
    • Software Debugging-Related Issues
      • 1 Log Debugging
      • 2 Online Debugging Method
      • 3 Restoring the Crash Context from a Memory Dump
      • 4 Methods for Saving the Crash Context
  • Application Notes
    • Low-Power Development Guide
    • Application Startup Flow
    • NandFlash_BBM Analysis Guide
    • SF32LB52-DevKit-Core-3p3 Development Board Test Guide
  • Best Practices
    • AI Xiaozhi

Hardware Development

  • SiFli Selection Guide
    • SiFli Chip Model Guide
    • Module Model Guide
  • Chip Hardware Design Guide
    • SF32LB52x Hardware Design Guide
    • SF32LB52X Hardware Design Guide
    • SF32LB56xU Hardware Design Guide
    • SF32LB56xV Hardware Design Guide
    • SF32LB58x Hardware Design Guide
    • SF32 Series UART Automatic Flashing Design
    • SF32LB55x Hardware Design Guide
    • SF32LB52-MOD-1 Module EPD Display Design Guide
  • Development board
    • Development Board Model Guide
    • SF32LB52-DevKit-LCD Development Board User Guide
    • Guide to Making an LCM Adapter Board for SiFli Development Boards
    • Lichuang Huangshan Pi Development Board User Guide
    • SF32LB52-DevKit-Nano Development Board User Guide
    • SF32LB52-DevKit-Core-3p3 Development Board User Guide
    • SF32LB52-OED-6’-EPD Development Board User Guide
    • SF32LB56-DevKit-LCD Development Board User Guide
    • SF32LB58-DevKit-LCD Development Board User Guide
  • Module

Software Tools

  • Software and Hardware Tool Summary
    • Firmware flashing tool Impeller
    • Graphics Conversion Tool
    • Storage debugging tools
      • Flash Chipid and Type Configuration Guide
    • Screen module debugging
      • Screen module introduction
      • Display module framework introduction
      • Directory structure introduction
        • External
        • Built-in
      • Add display module (1) – Add files (copy files)
      • Add display module (2) – Modify the copied driver files
        • Modify the screen driver
        • Modify the screen TP driver
        • Modify the screen backlight driver
      • Add display module (3) – Modify Kconfig/Menuconfig
      • Example operations for adding a display module
        • SF32LB52x-DevKit-LCD example: adding an SPI-LCD (external)
        • Example: adding a QSPI-LCD on 525 (built-in)
        • Example: adding a DPI-LCD on 566 (built-in)
      • FAQ
      • Appendix
        • Display driver callback functions
        • Mapping table between application-layer functions and module driver-layer functions
        • List of adapted display modules
      • LCD frame-rate calculator
    • sftool

Product Introduction

  • About SiFli

On this page

  • 6.1 55 Series ADC Calibration Principle
  • 6.2 Debug Method for Inaccurate ADC Sampling of Vbat Battery Voltage
  • 6.3 ADC Notes
SiFli-Wiki 0 0
Edit this page
  1. SiFli-Wiki /
  2. FAQ Frequently Asked Questions /
  3. Chip-Related Issues /
  4. 6 ADC Related
View as Markdown Open in ChatGPT Open in Claude

6 ADC Related¶

6.1 55 Series ADC Calibration Principle¶

The sf32lb55x chip has a 10-bit ADC. To ensure ADC sampling accuracy:
Calibration principle:
When the chip leaves the factory, the ADC values of each chip at 1.0V and 2.5V are measured and written into the factory area in flash, with the ID FACTORY_CFG_ID_ADC.;
During ADC initialization sifli_adc_init, these two values are read from the factory area of flash, namely the variables vol10 and vol25, which correspond to the voltage values 1.0v and 2.5v;

Through the function

sifli_adc_calibration(cfg.vol10, cfg.vol25, vol1, vol2, &off, &rat);
#define ADC_STANDARD_X3_VOL1           (1000)
#define ADC_STANDARD_X3_VOL2           (2500)

A linear line between the ADC values of the corresponding registers and the voltage values is calculated;
The offset value offset and linear ratio ratio of this line are obtained. The offset value is the calculated register value corresponding to 0V;

All values read by the ADC later obtain the corresponding voltage value through this offset and radio ratio;
Note:
Early versions used the two sampling points 1V and 2.5V as ADC calibration points.

#define ADC_STANDARD_X3_VOL1           (1000)
#define ADC_STANDARD_X3_VOL2           (2500)

New versions use two sampling points, 0.3 V and 0.8 V, as ADC calibration points.

#define ADC_STANDARD_X1_VOL1           (300)
#define ADC_STANDARD_X1_VOL2           (800)

To distinguish it from the calibration method using the two sampling points 0.3V and 0.8V, the highest bit of these two calibration values is set to 1, as follows:

alt text

if ((cfg.vol10 & (1 << 15)) && (cfg.vol25 & (1 << 15))) // small range, use X1 mode

The corresponding sifli_adc_get_mv calculation method also uses different algorithms for the two different calibration ranges, adc_range.

When using the calibration method with the two sampling points 0.3V and 0.8V, the accuracy is insufficient when the voltage is close to 0V and after it exceeds 1V. In addition, in this mode, the software register ADC_CFG_RE disables the GPADC_ADC_CFG_REG1_ANAU_GPADC_ATTN3X mode, that is, it disables the internal voltage divider resistor. Therefore, the ADC test point cannot be directly connected to a voltage above 1.1V; otherwise, the chip may be burned out.

alt text
When using the calibration method that takes the two sampling points 1V and 2.5V as ADC calibration points, the register configuration enables GPADC_ADC_CFG_REG1_ANAU_GPADC_ATTN3X mode. The voltage divider resistor inside the chip is enabled, providing 3x attenuation, and the input voltage must not exceed 3.3V.

6.2 Debug Method for Inaccurate ADC Sampling of Vbat Battery Voltage¶

a. Use a multimeter to test the sampling point level. The currently recommended voltage divider circuit uses 1M/220k voltage divider resistors with 1% accuracy;
Therefore, the level at the sampling point should be within the following corresponding voltages. If it does not match, confirm the resistance values and accuracy of the voltage divider resistors;
(Note: When measuring the sampling point voltage with a multimeter or oscilloscope, the input impedance of the introduced device will cause a 30mV voltage drop.)

alt text

alt text
b. After power-on startup and after wake-up from sleep, ADC sampling during the first approximately 300ms may be inaccurate, as shown in the following figure:

alt text
By capturing the ADC sampling waveform at startup with an oscilloscope, you can find that in addition to the default high level at the beginning, the ADC waveform also has charging and discharging caused by the rc circuit, causing the sampling to stabilize only after about 350ms. In actual applications, add a sampling delay or filter out the initial unstable sampling values according to the actual situation.
c. In addition, after entering standby, the following sampling point waveform may appear:

alt text
After waking up from standby, the sampling point has the following waveform:

alt text
The reason here is that PB10 is in the internal pull-up state by default before initialization. When used as an ADC input, it needs to be configured in pinmux.c as PIN_NOPULL and in PIN_ANALOG_INPUT mode;
As shown in the figure below, the following setting in the red box is missing and should be set to PIN_ANALOG_INPUT mode, which causes the internal pull-up resistor on PB10 above to be enabled, Occasionally, the sampled voltage may be very high;

alt text
d. The 55x chip has not been calibrated;
Chips are calibrated before leaving the factory. After calibration, ADC calibration parameters are stored in the factory area of flash. For details, refer to the section on the ADC calibration principle.

6.3 ADC Notes¶

a. The maximum sampling value for 55x is 1.1V, and for 56x and 52x it is 3.3V. The sampling voltage must not be greater than this value; otherwise, the ADC module can easily be damaged.
b. When connecting the 56x log uart output to an external PC, the reference level of the external hardware serial-port tool used must match the IO level. Otherwise, ADC sampling accuracy will be affected. For example, if the IO level is 3.3v and the reference level of the externally connected hardware serial-port tool is 5V, the sampled adc value will be much lower than normal. A 4V battery may be detected as only 3.3V.
c. When using a multimeter to measure the voltage at the sampling point, because a resistor has been introduced, the measured value is generally slightly lower than the actual value.

Previous
5 RTC Related
Next
7 I2C-related

2025, SiFli

Made with Sphinx and Shibuya theme.